Atomera Q1 Earnings Call Highlights

Key Points

• Atomera is prioritizing Gate-All-Around (GAA) transistors for 2nm and beyond, reporting measured silicon where MST outperformed another industry approach for a critical source/drain liner and entering evaluations with two GAA customers; electrical results could take ~6 months and the company is aiming to convert engagements into JDAs in the near term.
• Management flagged a meaningful GaN breakthrough where MST dramatically reduces the parasitic sheet charge at the GaN-on-silicon interface, calling the preliminary data best-in-decades and expanding ecosystem work (200mm/300mm, Synopsys, universities, labs) to speed validation and commercialization.
• Q1 results show a GAAP net loss of $6.1M (non‑GAAP loss $4.9M) and only $11k of revenue, but Atomera strengthened its balance sheet to $41.1M in cash after a $25M registered direct offering and is holding 2026 non‑GAAP operating expense guidance near $18.5M.

Atomera NASDAQ: ATOM executives said the company made progress across several customer engagements during its first-quarter 2026 earnings call, highlighting momentum in advanced logic, memory, RF, power devices, and gallium nitride (GaN) applications for its Mears Silicon Technology (MST).

Gate-All-Around focus and customer evaluations

President and CEO Scott Bibaud said Atomera is prioritizing Gate-All-Around (GAA) transistors as the semiconductor industry transitions to 2-nanometer nodes and beyond. He described dopant diffusion control as “critical” for performance and reliability in these architectures and said Atomera is seeking adoption at each of the four companies developing GAA transistors: TSMC, Samsung, Intel, and Rapidus.

Bibaud said Atomera recently obtained measured silicon results showing MST performing significantly better than another approach used in the industry for a “critical source drain liner application” in small-geometry transistors. In the Q&A, he clarified that the measured results were generated “in conjunction with our strategic partner,” using Gate-All-Around structures the partner had available. He said those results have helped “open the doors” with target customers.

Bibaud said Atomera is now actively conducting evaluations with two GAA customers using those customers’ own structures. He explained that while initial demonstrations can be done externally, further work may require MST to be installed inside a customer’s fab due to the complexity of advanced-node structures.

On timing, Bibaud said the evaluation work will take time. He estimated Atomera’s own work could take “2 to 3 months,” after which customers may run wafers through their lines for “several months,” meaning it “could be in the order of 6 months” before electrical results emerge. Structural analysis, such as TEM imaging, could be completed more quickly, he added.

Asked about milestones to convert GAA engagements into joint development agreements (JDAs), Bibaud outlined a typical sequence Atomera sees with customers:

• Review of TCAD simulations showing potential performance
• Silicon demonstrations validating results
• Demonstrations on the customer’s specific structures (the stage Atomera said it is in with two customers)
• Installation and tuning in the customer’s fab, which would involve licensing and likely a JDA

He said legal agreements at these companies “do not move fast,” but added that Atomera is “working hard” and hopes to announce JDAs “in the near future.”

Pipeline updates: memory, RF SOI, power, and STMicroelectronics

Bibaud said the company’s customer pipeline remains active “across multiple domains.” He said work with a “large IDM customer” is continuing and Atomera expects additional results from wafer runs soon. He also discussed engagement with STMicroelectronics, saying Atomera has been working with “multiple business units” there and recently received results that suggest the company will “start re-engaging” on product development, though he said Atomera is not yet able to discuss details and STMicroelectronics has not authorized disclosure.

In memory, Bibaud said Atomera is in discussions with large memory manufacturers and working on “multiple solutions” using MST for next-generation DRAM and high-bandwidth memory transistors, describing the sector as capacity-constrained and motivated to evaluate methods that could increase output. In the Q&A, he said Atomera is “further ahead” with GAA customers than with memory manufacturers, although he noted strong interest due to similar dopant diffusion challenges.

In RF SOI, Bibaud said customer silicon runs have confirmed results matching Atomera’s TCAD simulations for both power switch and LNA applications. He described the main near-term issue as not performance, but rather “the most efficient path to commercialization,” particularly when fabless licensees are involved and business structures must align with manufacturing flows.

In power devices, he said Atomera is targeting MST to TrenchFET and HBT transistors for “high frequency, high speed, and high voltage applications,” and noted wafers are moving forward with the company’s “second JDA partner,” with efforts continuing toward a production pathway.

GaN: new RF discovery and expanded ecosystem engagement

Bibaud said Atomera achieved what he called a meaningful GaN advancement during the quarter, including preliminary data indicating MST can “dramatically reduce” a parasitic channel that forms at the GaN-on-silicon interface. He described the parasitic sheet charge layer as a known limiter of RF performance in GaN-on-silicon and said eliminating it has been a topic of study for decades.

According to Bibaud, MST’s interface engineering can block gallium and aluminum ions from entering the silicon substrate. He cited feedback from “an industry veteran” who told Atomera the data was the best measured sheet charge he had seen in 20 years, while emphasizing the company is continuing validation with test and measurement partners.

Bibaud said RF GaN-on-silicon has applications in wireless infrastructure, military, defense, satellite markets, and is being evaluated for integrated RF front ends including potential 6G uses. He added Atomera is engaging customers on both 200mm and 300mm wafers, depending on customer requests, and said wafer size can be a key GaN-on-silicon advantage for cost structure and high-volume manufacturing.

He also pointed to growing collaboration across the ecosystem, including engagements involving Incize, Synopsys, Texas State University, Sandia, and others, describing parallel commercial and research paths as a way to compress development cycles.

Bibaud additionally discussed an expanded collaboration with Synopsys, building on Atomera’s work enabling MST modeling in Sentaurus TCAD through its MSTcad tool set. He said the relationship is extending into GaN workflows for RF and power devices, with Atomera providing feedback on Synopsys’ GaN models and jointly developing marketing materials.

Strategic tool partner collaboration deepens

In response to a question about its strategic development partner, Bibaud said Atomera aims to work broadly with major epi tool vendors, but noted that under the existing strategic partnership, co-development activity has increased significantly. He said the companies now have weekly engineering meetings to generate test data for customer marketing and to support customer-requested demonstrations.

He also said the collaboration has expanded into joint marketing and sales efforts, an area he said Atomera had not previously done with the partner, and noted that tool vendors may financially benefit if Atomera’s technology is adopted because of associated equipment sales.

Financial results and outlook

Chief Financial Officer Frank Laurencio reported a GAAP net loss of $6.1 million, or $0.17 per share, for Q1 2026, compared with a GAAP net loss of $5.2 million, also $0.17 per share, in Q1 2025. On a non-GAAP basis, Atomera posted a net loss of $4.9 million, or $0.14 per share, versus a non-GAAP net loss of $4.4 million, or $0.15 per share, a year earlier.

GAAP operating expenses were $6.2 million, up from $5.5 million in Q1 2025. Laurencio said stock-based compensation increased $397,000, driven primarily by new hires and the adoption of performance stock units (PSUs) for executives beginning in Q1 2025. He noted that the first tranche of PSUs issued in Q1 2025 “lapsed without vesting” because Atomera did not meet the required stock price performance threshold relative to the Russell 2000.

Non-GAAP operating expenses were $4.8 million, up from $4.4 million in Q1 2025, with sales and marketing higher due to two executive hires since October and R&D higher due to outsourced engineering and metrology spending tied to wafer runs for GAA engagements, an IDM customer, and a JDA customer.

Sequentially, non-GAAP net loss widened from $3.3 million in Q4 2025 to $4.9 million in Q1 2026. Laurencio attributed part of the quarter-to-quarter operating expense increase to a Q4 2025 reversal of accrued executive bonus expense after the compensation committee withheld approximately $669,000 of the 2025 executive bonus, with the opportunity for executives to earn it back in 2026 upon achieving commercial objectives.

Atomera ended the quarter with $41.1 million in cash, cash equivalents, and short-term investments as of March 31, 2026, up from $19.2 million at December 31, 2025. Operating cash use was $4.6 million in Q1. Laurencio said the company closed a $25 million registered direct offering in February, selling 5 million shares at $5 per share for net proceeds of $23.6 million after fees and expenses. Atomera also raised $3.2 million in Q1 through its at-the-market program, selling about 1.3 million shares at an average price of $2.47. Laurencio said the company had 38.7 million shares outstanding.

On expense outlook, Laurencio reiterated Atomera expects 2026 annual non-GAAP operating expenses of approximately $18.5 million and said the company is “holding to that number.”

Revenue in Q1 2026 was $11,000, consisting of fees for wafer deliveries to the large IDM customer. Deferred revenue was $96,000. Laurencio said approximately $46,000 of expected Q1 revenue shifted into Q2 due to delayed wafer shipments, and he guided Q2 revenue to a range of $50,000 to $100,000.

In closing remarks, Bibaud said the company remains focused on translating simulation and customer silicon results into commercial agreements that can drive “repeatable revenue.” Asked whether deals could still be signed in 2026, he said the year was still early and that he remained hopeful, adding that wafer-based product opportunities in areas such as GaN, RF SOI, and memory could potentially reach market faster.

About Atomera NASDAQ: ATOM

Atomera Inc is a materials engineering company that develops and licenses advanced thin film technologies for the semiconductor industry. Its flagship offering, Mears Silicon Technology (MST), is designed to enhance transistor performance, improve power efficiency and boost device yields. Atomera's solutions are integrated into existing fabrication processes without major changes to equipment or materials flows, enabling foundries and integrated device manufacturers to adopt the technology with minimal disruption.

At the core of Atomera's business model is the licensing and patent-licensing of MST.

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