Cadence Design Systems Q4 Earnings Call Highlights

Key Points

• Cadence closed fiscal 2025 with strong financials — 14% revenue growth, a roughly 45% operating margin, and a record backlog of $7.8 billion (Q4 revenue $1.44B; FY revenue $5.297B).
• The company is rolling out "agentic" AI workflows and launched the ChipStack AI Super Agent, which Cadence says can drive up to 10x productivity for chip design and has endorsements from Qualcomm, NVIDIA and others, increasing usage of its EDA and verification tools.
• For fiscal 2026 Cadence guided to $5.9–6.0 billion revenue with non-GAAP operating margins around 44.75%–45.75%, expects to use about 50% of free cash flow for buybacks, and said ~67% of 2026 revenue is covered by beginning backlog.

Cadence Design Systems NASDAQ: CDNS reported what management described as an “excellent” finish to fiscal 2025, highlighted by double-digit growth, operating leverage, and a record backlog as customers increase design activity tied to AI infrastructure and more in-house silicon development.

2025 results: revenue growth, margin expansion, and record backlog

CEO Anirudh Devgan said Cadence closed “an outstanding 2025” with 14% revenue growth and a 45% operating margin for the year. He added that the company ended 2025 with a record backlog of $7.8 billion, which he said was “well ahead of plan” and reflected broad portfolio strength and increasing contributions from AI solutions.

CFO John Wall provided detailed financial results for the fourth quarter and full year. Cadence reported Q4 revenue of $1.44 billion and full-year revenue of $5.297 billion. Wall said productivity improvements helped drive a non-GAAP operating margin of 45.8% in Q4 and 44.6% for the full year.

• GAAP operating margin: 32.2% (Q4) and 28.2% (FY2025)
• Non-GAAP operating margin: 45.8% (Q4) and 44.6% (FY2025)
• GAAP EPS: $1.42 (Q4) and $4.06 (FY2025)
• Non-GAAP EPS: $1.99 (Q4) and $7.14 (FY2025)

On cash flow and capital return, Wall said Cadence ended the year with $3.001 billion in cash and $2.5 billion in principal debt outstanding. Operating cash flow was $553 million in Q4 and $1.729 billion for the year. DSOs were 64 days, and the company repurchased $925 million of shares during 2025.

AI strategy: “agentic” workflows and a new ChipStack AI Super Agent

Devgan emphasized what he called Cadence’s “three-layer cake” approach to engineering software: accelerated compute as the base layer, simulation and optimization as the middle layer, and AI on top to drive exploration and generation. He argued this architecture keeps AI outputs “physically accurate and grounded in scientific truth.”

Cadence said it is deploying agentic AI workflows in which intelligent agents autonomously call underlying Cadence tools. Devgan said these AI flows act as a “force multiplier,” enabling customers to run significantly more design exploration and accelerate time to market, while also increasing product usage across the platform.

Devgan highlighted a new product launch: ChipStack AI Super Agent, which he called the “world’s first agentic AI solution for automating chip design and verification.” He said it is built on Cadence’s existing products and can deliver up to 10x productivity improvement for tasks including design coding, generating test benches, and debugging. He also said ChipStack has received endorsements from Qualcomm, NVIDIA, Altera, and Tenstorrent, among others.

In the Q&A, Devgan pushed back on the idea that AI could reduce demand for EDA tools. He said Cadence has seen “absolutely no discussion” of customers reducing usage, arguing instead that agentic flows increase tool usage because AI-generated work still relies on Cadence’s simulation, verification, and optimization engines.

Business highlights: EDA, hardware systems, IP, and SDA

Cadence pointed to broad performance across major product lines in 2025:

• Core EDA: Devgan said core EDA revenue grew 13% in 2025 and that the recurring software business “re-accelerated to double-digit growth” in Q4.
• Hardware systems: Devgan said the hardware business delivered another record year, with over 30 new customers and higher repeat demand from AI and hyperscalers. He noted that seven of the top 10 customers were “Dynamic Duo” customers and said Cadence expects another record year for hardware in 2026 with strong backlog. In response to questions about the cycle, Devgan said hardware systems are “indispensable” for complex chip design and that large customers buy systems “almost every year.”
• Digital full flow adoption: Devgan said Cadence added 25 new digital full flow logos in 2025 and highlighted a marquee hyperscaler adopting Cadence digital full flow for its “first full customer-owned tooling AI chip tape-out.”
• Custom/analog: Devgan cited growth in the Spectre circuit simulator at leading AI and memory companies and ongoing traction for Virtuoso Studio. He said a large electronics and EV customer reported a 30% layout efficiency gain using AI-driven design migration.
• IP: Devgan said IP revenue grew nearly 25% in 2025, with momentum across memory and interface IP (including HBM, UCIe, PCIe, DDR, and SerDes). He highlighted adoption of memory IP and referenced LPDDR6 memory IP. Cadence also launched a Tensilica HiFi iQ DSP in Q4, which Devgan said offers up to 8x higher AI performance and more than 25% energy savings for targeted markets.
• System Design and Analysis (SDA): Devgan said SDA grew 13% in 2025. He highlighted the Millennium M2000 AI supercomputer featuring NVIDIA Blackwell, the company’s 3D IC platform, and momentum in Allegro X, including decisions by Infineon (Q3) and STMicroelectronics (Q4) to adopt it for PCB design.

Partnerships, foundry collaborations, and acquisition context

Devgan described expanded collaboration with multiple foundries, including work with TSMC on AI flows for N2 and A16 technologies, joining the Intel Foundry Accelerator Design Services Alliance, a commitment from Rapidus to Cadence’s core EDA portfolio, and expanded collaboration with Samsung Foundry around AI-driven design and IP.

He also said Cadence deepened its partnership with Broadcom through a strategic collaboration to develop agentic AI workflows for next-generation products and expanded its footprint at hyperscalers across EDA, hardware, IP, and system software.

On M&A, management reiterated that the pending acquisition of Hexagon’s design and engineering business was not included in the 2026 outlook. In Q&A, Wall said Cadence has previously described Hexagon’s annualized revenue at about $200 million.

2026 outlook: growth, margins, and capital return

Wall said Cadence’s 2026 outlook assumes export control regulations remain “substantially similar” to current rules for the remainder of the year. For fiscal 2026, Cadence guided for:

• Revenue: $5.9 billion to $6.0 billion
• GAAP operating margin: 31.75% to 32.75%
• Non-GAAP operating margin: 44.75% to 45.75%
• GAAP EPS: $4.95 to $5.05
• Non-GAAP EPS: $8.05 to $8.15
• Operating cash flow: approximately $2.0 billion

For the first quarter, Cadence guided for revenue of $1.42 billion to $1.46 billion and non-GAAP EPS of $1.89 to $1.95.

Wall also said Cadence expects to use about 50% of free cash flow for share repurchases in 2026. Discussing visibility, he said about 67% of 2026 revenue is expected to come from beginning backlog, and he described hardware and China as areas where the company typically “de-risks” guidance early in the year due to pipeline visibility.

On China, Wall said the company expects China to remain around 12% to 13% of revenue in 2026, similar to 2024 and 2025, adding that design activity and bookings growth in the region remain strong, with greater visibility in the first half than the second.

About Cadence Design Systems NASDAQ: CDNS

Cadence Design Systems, Inc NASDAQ: CDNS is a global provider of electronic design automation (EDA) software, hardware and intellectual property used to design and verify advanced semiconductor chips, systems-on-chip (SoCs), printed circuit boards (PCBs) and packaging. Headquartered in San Jose, California and founded in 1988, Cadence serves semiconductor companies, original equipment manufacturers and system designers across the globe, helping customers accelerate design cycles and manage the complexity of modern integrated systems.

The company's offerings span software tools for digital, custom/analog and mixed-signal design, verification and signoff, as well as solutions for system-level modeling, thermal and signal integrity analysis, and PCB and package design.

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